Design of Direct Digital Frequency Synthesizer Based on Improved RBF Neural Network
Keywords:
Direct digital frequency synthesizer; RBF neural network; Phase truncation error; Field Programmable Gate Array;Abstract
A high-performance direct digital frequency synthesizer based on an improved radial basis function (RBF) neural network is proposed. Compared with the traditional direct digital frequency synthesizer, it avoids phase truncation error and reduces resource consumption. In order to further improve the training efficiency and stability of the RBF neural network, an improved RBF neural network training algorithm is proposed. In the coarse adjustment stage, the K-means++ algorithm is used to quickly determine the initial activation function center, making the activation function center distribution more reasonable; in the fine adjustment stage, the L-BFGS-B algorithm is used to fine-tune the optimal center obtained in the coarse adjustment stage to further reduce the output error. The experimental results on the general FPGA platform show that when the output clock frequency of the direct digital frequency synthesizer based on the improved RBF neural network is 1.53 MHz, the spurious free dynamic range is 85.26 dB, the phase noise is -90.50 dBc/Hz@100 kHz, and no additional ROM resources are required.References
[1] An RBF neural network based on improved black widow optimization algorithm for classification and regression problems' [J] . Liu Hui,Zhou Guo,Zhou Yongquan,Huang Huajuan,Wei Xiuxi. Frontiers in Neuroinformatics . 2023
[2] Networked Control System Based on PSO-RBF Neural Network Time-Delay Prediction Model [J] . You Dazhang,Lei Yiming,Liu Shan,Zhang Yepeng,Zhang Min. Applied Sciences . 2022 (1)
[3] An Automatic Clock-Induced-Spurs Detector Based on Energy Detection for Direct Digital Frequency Synthesizer [J] . Lei Xin, Zhang Junan, Deng Jun, Yin Peng, Shu Zhou, Tang Fang. Sensors . 2022 (9)
[4] Solving generalized inverse eigenvalue problems via L-BFGS-B method [J] . Zeynab Dalvand,Masoud Hajarian. Inverse Problems in Science and Engineering . 2020
[5] Design and Analysis of Low Power and High SFDR Direct Digital Frequency Synthesizer [J] . Ji Min Choi,Dong Hyun Yoon,Dong Kyu Jung,Kiho Seong,Jae Soub Han,Woojoo Lee,Kwang Hyun Baek. IEEE Access . 2020
[6] An Adaptive Memory Multi-Batch L-BFGS Algorithm for Neural Network Training [J] . Zocco Federico,McLoone Seán. IFAC PapersOnLine . 2020 (2)
[7] optimParallel: An R Package Providing a Parallel Version of the L-BFGS-B Optimization Method [J] . Gerber Florian,Furrer Reinhard. The R Journal . 2019 (1)
Published
Issue
Section
License
Copyright (c) 2024 Ni Songshun, Zhang Changchun (Author)

This work is licensed under a Creative Commons Attribution 4.0 International License.
How to Cite
Similar Articles
- Chen Haowei, Liu Ao, Baisong, Huang Runhua, 4H-SiC CMOS High Temperature Integrated Circuit Design and Manufacturing , Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics: Vol. 44 No. 2 (2024)
- Zhang Yan, He Shanliang, A high-precision foreground calibration method for 16-bit current-steering DAC , Guti Dianzixue Yanjiu Yu Jinzhan/Research and Progress of Solid State Electronics: Vol. 44 No. 2 (2024)
You may also start an advanced similarity search for this article.