Development of 340 GHz low noise amplifier chip based on 101.6 mm wafer 35 nm InP HEMT process

Abstract

The fabrication of 35 nm enhanced InP high electron mobility transistors on 101.6 mm InP wafers was achieved. Through the design of InAs composite channel epitaxial structure, the room temperature two-dimensional electron gas mobility surface density product reached 4.2×10 ¹⁶ / (V·s). The platinum-titanium-platinum buried gate process technology was adopted, and the maximum transconductance of the typical device reached 2 900 mS/mm, the current gain cutoff frequency reached 460 GHz, and the maximum oscillation frequency was 720 GHz. At the same time, a 340 GHz low-noise amplifier chip was developed, with a small signal gain of 22 to 27 dB in the range of 310 to 350 GHz and a noise figure below 8 dB. A 340 GHz InP low-noise amplifier chip technology platform was established, laying the foundation for the development of terahertz low-noise monolithic microwave integrated circuits.